Inspiration
None of us had touched an FPGA before this weekend. We picked the Hardware Track because it was the one with a hard, measurable target: get every trade signal right, then use as little hardware as possible. Each time the number dropped, it pulled us into trying to drop it again.
What it does
Our Tang Nano 20K receives 8-byte price packets over UART for two items, A and B. It keeps a separate 16-price moving average for each one and sends back BUY, SELL or "repeat last action" for both items in an 8-byte response.
On the organizer's robust test it scores 84/84 packets and 168/168 actions with 0 timeouts. It also matches the reference on full-range prices (0–65535).
The final design uses 0 logic (0 LUTs, 0 ALUs) and 0 registers in Gowin's resource report.
How we built it
We wrote it in Verilog and built it with Gowin EDA on a Mac, programming the board with openFPGALoader. The first version worked at 374 LUTs. We cut it to 178, then 64, then 1 by moving work out of LUTs into flip-flops, adder chains and small RAMs.
Challenges we ran into
Getting started at all. We didn't have a Windows machine, so we had to get Gowin and the programmer running on macOS. The synthesis tool kept adding LUTs back. Simple comparisons and inverters got turned into logic cells, so we had to build those pieces from primitives directly. Timing bugs we couldn't see. One version sampled the incoming bits one tick early. It passed most packets and failed a few, and we found it by tracing simulations bit by bit.
Accomplishments that we're proud of
Going from 374 LUTs to 0 logic and 0 registers in one weekend, with 100% correctness the whole way. Every version was tested on real hardware, not just in simulation.
What we learned
How an FPGA actually works: LUTs, carry chains, flip-flops and block RAM, and what the tools count as "logic." How to design a UART from scratch, and why sampling timing matters. That a lookup table can replace almost any circuit if you can afford the memory.
Final GitHub Submission: Repository: https://github.com/isaiahdiamond/gqh-hardware Final Commit SHA: 2ee666ca7f45cda4715a18542dababf9f818f584
Built With
- bit-serial
- fpga
- gowin-eda
- gw2ar-18
- lookup-table
- openfpgaloader
- pyserial
- python
- tang-nano-20k
- verilator
- verilog
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