1. What it does

FDW-RF Engine is a deterministic database-synchronization engine for edge nodes operating over asynchronous, unreliable radio-frequency links — the environments where TCP/IP, the cloud and every conventional sync stack break down.

Its core invention (patent pending, Spanish Patent Office — OEPM) inverts the classic control hierarchy: instead of the network layer owning the transport, the local relational engine directly governs the physical state of the radio interface through an explicit 7-state Finite State Machine. The database becomes the physical router of the system.

The submitted prototype is an interactive Tactical Digital Twin of the ECGA-01 scenario: defending the electromagnetic perimeter of a Sovereign Critical Infrastructure adjacent to a high-emission industrial plant. Judges can inject FMEA stress events — wideband EW/Jamming and full Airgap isolation — live in the Streamlit UI and watch the FSM freeze the transactional semaphore, switch to Store-and-Forward, and reconverge with zero data loss and zero accepted replays, all hardened by a NIST PQC envelope (ML-DSA/Dilithium5 signatures + ML-KEM-1024 encapsulation) at a sealed Cryptographic Data Diode boundary.

No cloud. No central server. No single point of failure. Strong Eventual Consistency by construction.

2. How we built it

48-Hour Sprint Disclosure & Provenance: While the underlying mathematical model and protocol specification originate from our prior research and patent filing (OEPM, May 2026), the entire functional software artifact submitted here was built from scratch during this 48-hour hackathon sprint: the pure-Python NIST PQC sealed Data Diode emulator, the 7-state FSM state engine, the interactive Streamlit + Plotly Tactical Digital Twin, the live FMEA stress-injection bench, and the Deterministic Simulation Testing (DST) invariant test harness.

  • bridge_pqc.py — the sealed Data Diode engine in pure Python: the 7-state FSM (IDLE, WAITING_FOR_GOOD_LINK, SENDING, WAITING_FOR_ACK, RETRANSMITTING, RECONCILING, ERROR), a Write-Ahead Log journal, strictly monotonic per-peer op_id idempotency, Hybrid Logical Clocks with Last-Writer-Wins reconciliation, an elastic backoff scheduler, and the RSSI/SNR link-viability filter.
  • NIST PQC envelope — a dependency-free, pure-Python deterministic emulation of ML-KEM-1024 (FIPS 203) and ML-DSA-87/Dilithium5 (FIPS 204) reproducing the exact standard artifact geometry (1568-byte ciphertexts, 4627-byte signatures), so the full sign/verify/encapsulate/anti-replay protocol flow is exercised identically to a production backend.
  • app.py — the Tactical Digital Twin: Streamlit + Plotly RF spectrum heatmap of the 868–870 MHz band, FMEA fault-injection toggles, a live FSM trajectory monitor and the interactive WAL journal with a deterministic replay digest.
  • Methodology — Deterministic Simulation Testing (DST): every run is seeded; identical seeds reproduce byte-identical WAL journals. Five protocol invariants ship as executable self-tests (python bridge_pqc.py).

3. Challenges we ran into

  • Translating formal protocol models into a working 48h executable simulation. Converting theoretical state transitions into a deterministic, zero-dependency Python simulation engine while strictly upholding mathematical invariants.
  • Strict state transition enforcement. Ensuring every FSM transition obeys legal protocol rules at runtime — any illegal transition raises a hard fault rather than degrading silently.
  • PQC without native dependencies. Hackathon judges must be able to run the demo with pip install streamlit plotly pandas numpy and nothing else. Building a faithful pure-Python emulation of the FIPS 203/204 artifact geometry and protocol flow — while being transparent that it is a concept simulation, not production crypto — was a deliberate engineering and integrity decision.
  • Making determinism visible. Proving Strong Eventual Consistency in a 3-minute demo required surfacing the WAL replay digest in the UI: two runs, same seed, same digest — a property judges can verify themselves.
  • Compressing the narrative. Foreign Data Wrappers, HLC, SEC and PQC are dense; the Digital Twin UI was redesigned around one sentence: the database governs the radio.

4. Accomplishments that we're proud of

  • A patent-backed core (OEPM filing) presented as a runnable, verifiable artifact — not a slide deck.
  • Replay attacks are impossible by construction, not by configuration: duplicate op_ids are strict no-ops at the architecture level.
  • A live FMEA console: judges personally inject EW/Jamming and Airgap faults and watch the system refuse to lose data.
  • Full determinism: the entire simulation, including the PQC envelope, reproduces bit-identical journals from a seed — the foundation of our DST verification discipline.

5. What we learned

  • Inverting the control hierarchy simplifies everything downstream: once the relational engine owns the radio state, idempotency, backoff and reconciliation stop being distributed-systems folklore and become checkable invariants.
  • Deterministic Simulation Testing is the highest-leverage practice for protocol engineering: every bug we found was reproducible from a seed on the first attempt.
  • Post-quantum readiness is an architecture decision, not a library swap: designing the Data Diode interface around the FIPS 203/204 artifact geometry now means the certified backend drops in later without touching the protocol.
  • Sovereignty constraints (no cloud, no GPS, airgap tolerance) are not limitations — they are a forcing function for stronger designs.

6. What's next for FDW-RF Engine

  • Embedded Hardware Integration: Port the FSM core to sub-GHz LoRa (SX126x-class) and BLE 5.x front-ends, reusing the DST invariants as hardware acceptance gates.
  • Certified PQC Backend: Swap the pure-Python emulation for native liboqs/PQClean C implementations behind the unchanged CryptographicDataDiode interface.
  • ECGA-01 Field Trial: Live electromagnetic-perimeter exercise with calibrated EW injection at a partner critical-infrastructure site.
  • DePIN Expansion: Open the mesh to third-party sovereign edge nodes with per-peer monotonic namespaces, keeping Strong Eventual Consistency across an arbitrarily partitioned physical network.

FDW-RF Engine — Patent pending (OEPM). Tactical Digital Twin & Deterministic Simulation. Submitted for evaluation purposes only.

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