Inspiration

In physical AI and critical embedded edge systems (robotics, autonomous systems, industrial machinery), AI models cannot afford server-class runtimes, cloud latency, or unpredictable memory behavior. A single dynamic memory allocation (malloc) failure or heap fragmentation panic inside a hard real-time loop can bring down physical infrastructure.

We were inspired to answer a fundamental question: Can a predictive maintenance AI model run inside a real-time operating system (RTOS) with zero heap memory allocation, native Arm SIMD acceleration, and guaranteed memory bounds security? This project proves it is entirely possible.


What it does

The ARM-RTEMS AI Optimization Engine is a deterministic, real-time bearing-fault predictive maintenance classifier built for Arm Cortex-A9 running on RTEMS 7 . This project is submitted to the Physical AI track.

  • Zero Dynamic Allocation (0 Bytes Heap): Eliminates malloc() entirely to prevent heap fragmentation.
  • Arm NEON SIMD Accelerated: Vectorized integer inference utilizing Cortex-A9 SIMD hardware registers.
  • 100% Mathematical Equivalence: Validated over 100,000 deterministic test vectors (including INT8 edge cases) with 0 mismatches (100.00% agreement).
  • C11 Bounds & Fault Injection Protection: Implements bounds checking on incoming sensor payloads, successfully blocking 64-byte oversized fault-injection attacks while keeping hardware memory guards intact.
  • 72-Byte Footprint: Consumes only 48 B ROM (weights) and 24 B RAM (state).

How we built it

  1. Floating-Point Baseline: Trained an FP32 predictive maintenance model in Python using vibration feature vectors.
  2. INT8 Quantization & Export: Quantized weights into signed 8-bit integers ($int8$) and exported them directly as C header constants.
  3. Integer Accumulation Math: Evaluated the neural network layers using wider 32-bit integer accumulation to prevent overflow during matrix multiplication: $$y_i = \sum_{j} (w_{ij} \cdot x_j) + b_i$$
  4. Arm NEON SIMD Kernels: Parallelized vector operations using native Arm intrinsics (int8x8_t), executing simultaneous multiply-accumulate operations across vector registers: $$\text{product}{16} = \text{vmull_s8}(\text{vdup_n_s8}(x_j), \text{vld1_s8}(W{ij}))$$
  5. RTEMS Task Packaging: Integrated the engine into an RTEMS 7 periodic task framework bound to a 20 ms sensor deadline.

Challenges we ran into

  • Overflow Prevention in INT8 Math: Fixed-point and low-precision integer arithmetic can overflow quickly. We had to carefully design wider integer accumulators ($int32_t$) during matrix multiplication inner loops.
  • Guaranteeing Zero Heap Allocations: Verifying that no library call secretly invoked malloc required strict symbol table analysis (nm) on the compiled .elf executable.
  • Ensuring Vectorization Equivalence: Eliminating rounding or truncation differences between scalar fallback execution and Arm NEON intrinsic pipelines across 100,000 test cases.

Accomplishments that we're proud of

  • Achieving 100.00% mathematical output agreement across 100,000 test vectors between the scalar reference implementation and the Arm NEON vectorized engine.
  • Proving mathematically that the engine uses 0 bytes of dynamic memory allocation via automated symbol table verification (make verify-no-malloc).
  • Building a resilient C11 bounds-checking protection mechanism that blocks oversized memory overflow attacks without introducing real-time latency penalties.

What we learned

  • How to write low-level Arm NEON SIMD intrinsics (vld1_s8, vdup_n_s8, vmull_s8) for fixed-point neural network inference.
  • How to enforce C11 Annex K-style bounds checking to secure real-time physical AI pipelines against malicious or corrupted sensor streams.
  • How to construct completely deterministic, real-time software architectures on RTEMS 7.

What's next for ARM-RTEMS AI Engine: Deterministic INT8 & NEON Physical AI

  • Expanding support to multi-layer deep neural networks and Convolutional Neural Networks (CNNs) for vision-guided robotics on Arm Cortex-A and Cortex-M targets.
  • Developing an automated quantization-aware training (QAT) toolchain for seamless model export into bare-metal C header files.
  • Integrating the deterministic engine into open-source real-time control frameworks and industrial robotics stacks.

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